Sharp LH530800A
The LH530800A is a mask-programmable ROM organized as 131,072 × 8 bits (1,048,576 bits). It is fabricated using silicon-gate CMOS process technology.FEATURES
● 131,072 words × 8 bit organization● Access time: 150 ns (MAX.)
● Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 µW (MAX.)
● Static operation
● TTL compatible I/O
● Three-state outputs
● Single +5 V power supply
● Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP 32-pin, 450-mil QFJ (PLCC)
● JEDEC standard EPROM pinout (DIP)
DESCRIPTION
32-PIN DIP 32-PIN SOP CMOS 1M (128K × 8) MROM PIN CONNECTIONS TOP VIEW NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc NC NC A14 A13 A8 A9 A11 OE/OE A10 CE D7 D6 D5 D4 D3 530800A-1 Figure 1. Pin Connections for DIP and SOP Packages 32-PIN QFJ TOP VIEW VCC A12 A15 A16 NC NC 4 A7 A6 A5 A4 A3 A2 A1 A0 D0 5 6 7 8 9 10 11 12 13 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 A14 A13 A8 A9 A11 OE/OE A10 CE D7 14 15 16 17 18 19 20 D1 GND D2 D3 D4 D5 D6 NC 530800A-7 Figure 2. Pin Connections for QFJ (PLCC) Package 1 LH530800A CMOS 1M Mask-Programmable...