Sharp LH5324500
The LH5324500 is a 24M-bit mask-programmable ROM organized as 3,145,728 × 8 bits (Byte mode) or 1,572,864 × 16 bits (Word mode) that can be selected by a BYTE input pin. It is fabricated using silicon-gate CMOS process technology.FEATURES
● 3,145,728 words × 8 bit organization (Byte mode) 1,572,864 words × 16 bit organization (Word mode)● Access time: 150 ns (MAX.)
● Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 µW (MAX.)
● Static operation
● TTL compatible I/O
● Three-state outputs
● Single +5 V power supply
● Package: 44-pin, 600-mil SOP
DESCRIPTION
CMOS 24M (3M × 8/1.5M × 16) MROM PIN CONNECTIONS 44-PIN SOP NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE D0 D8 D1 D9 D2 D10 D3 D11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A20 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE GND D15/A-1 (LSB) D7 D14 D6 D13 D5 D12 D4 VCC 5324500-1 TOP VIEW Figure 1. Pin Connections for SOP Package 1 LH5324500 CMOS 24M MROM A20 44 A19 43 A18 2 A17 3 A16 34 A15 35 A14 36 MEMORY MATRIX (3,145,728 x 8) (1,572,864 x 16) 31 D15 29 D14 27 D13 25 D12 ADDRESS BUFFER DATA SELECTOR/OUTPUT BUFFER A13 37 A12 38 A11 39 A10 40 A9 41 A8 42 A7 4 A6 5 A5 6 A4 A...