Sharp LH540245
the LH540235/45 FIFOs in IDT-Compatible Operating Mode may skip over BOLD ITALIC sections, if they wish. The LH540235/45 parts are FIFO (First-In, First-Out) memory devices, based on fully-static CMOS dual-port SRAM technology, capable of containing up to 2048 or 4096 18-bit words respectively. They can replace two or more byte-wide FIFOs in many applications, for microprocessorto-microprocessor or microprocessor-to-bus communication.FEATURES
● Fast Cycle Times: 20/25/35 ns● Pin-Compatible Drop-In Replacements for IDT72235B/45B FIFOs 2048 × 18 / 4096 × 18 Synchronous FIFOs
● May be Cascaded for Increased Depth, or Paralleled for Increased Width
● 16 mA-IOL High-Drive Three-State Outputs
● Five Status Flags: Full, Almost-Full, Half-Full, Almost-Empty, and Empty; ‘Almost’ Flags are Programmable
● Choice of IDT-Compatible or Enhanced Operating Mode; Selected by an Input Control Signal
● Device Comes Up into One of Two Known Default States at Reset Depending on the State of the EMODE Control Input: Programming is Allowed, but is not Required
● In Enhanced Operating Mode, Almost-Full, Half-Full, and Almost-Empty Flags can be Made Completely Synchronous
● In Enhanced Operating Mode, Duplicate Enables for Interlocked Paralleled FIFO Operation, for 36-Bit Data Width, when Selected and Appropriately Connected
● Internal Memory Array Architecture Based on CMOS
● ‘Synchronous’ Enable-Plus-Clock Control at Both Input Port and...