Sharp LH543601
The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. The LH543601 is ideal either for wide unidirectional applications or for bidirectional data applications; component count and board area are reduced.| Part No. | LH543601 |
|---|---|
| Datasheet | LH543601 Download |
| Manufacturer |  Sharp |
| Description | 256 x 36 x 2 Bidirectional FIFO |
| Buy | Stock & Price |
FEATURES
● Fast Cycle Times: 20/25/30/35 ns● Pin-Compatible and Functionally-Compatible
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● Two 256 × 36-bit FIFO Buffers Full 36-bit Word Width Selectable 36/18/9-bit Word Width on Port B Independently-Synchronized (‘Fully-Asynchronous’) Operation of Port A and Port B Both Ports 0.7µ-Technology Replacement for Sharp LH5420 256 × 36 × 2 Bidirectional FIFO FUNCTIONAL
DESCRIPTION
FIFO #1 and FIFO #2 each are organized as 256 by 36 bits. The LH543601 has two 36-bit ports, Port A and Port B. Each port has its own port-synchronous clock, but the two ports may operate asynchronously relative to each other. Data flow is initiated at a port by the rising edge of the appropriate clock; it is gated by the corresponding edgesampled enable, request, and read/write control signals. At the maximum operating frequency, the clock duty cycle may vary from 40% to 60%. At lower frequencies, the clock waveform may be quite asymmetric, as long as the minimum pulse-width conditions for clock-HIGH and clock-LOW remain satisfied; the LH543601 is a fully-static part.
