Sharp LH5P860
The LH5P860 is a 512K-bit Pseudo-Static RAM organized as 65,536 × 8 bits. It is fabricated using silicon-gate CMOS process technology. With its built-in oscillator, it is easy to refresh memories without an external clock.FEATURES
● 65,536 × 8 bit organization● Access time: 80 ns (MAX.)
● Cycle time: 140 ns (MIN.)
● Single +5 V power supply
● Pin compatible with 1M standard SRAM
● Power consumption (MAX.): Operating: 440 mW Self refresh (TTL level): 5.5 mW Self refresh (CMOS level): 2.75 mW
● TTL compatible I/O
● 512 refresh cycles/8 ms (MAX.)
● Available for auto-refresh and self-refresh modes
● Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP CMOS 512K (64K × 8) Pseudo-Static RAM
DESCRIPTION
PIN CONNECTIONS 32-PIN DIP 32-PIN SOP RFSH NC A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 CE2 R/W A13 A8 A9 A11 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 5P860-1 TOP VIEW Figure 1. Pin Connections for DIP and SOP Packages 1 LH5P860 CMOS 512K (64K × 8) Pseudo-Static RAM 16 GND 32 VCC A0 12 A1 11 A2 10 A3 9 A4 8 A5 7 A6 A7 A8 A9 6 5 27 26 ROW ADDRESS A0 - A8 BUFFER SENSE AMPS I/O SELECTOR DATA IN BUFFER 13 I/O0 14 15 17...