Sharp LH6V4256
The LH6V4256 is a 262,144 word × 4-bit dynamic RAM which allows fast page mode access. The LH6V4256 is fabricated on SHARP’s advanced CMOS double-level polysilicon gate technology. With its input multiplexed and packaged in the standard 20-pin DIP, 26-pin SOJ, or 28-pin TSOP (I) packages, it is easy to realize memory systems with low power dissipation and large memory capacity.| Part No. | LH6V4256 |
|---|---|
| Datasheet | LH6V4256 Download |
| Manufacturer |  Sharp |
| Description | CMOS 1M (256K x 4) Dynamic RAM |
| Buy | Stock & Price |
DESCRIPTION
The LH6V4256 operates on a single +3.3 V power supply and the built-in biasing voltage generator circuit. PIN CONNECTIONS 20-PIN DIP I/O1 I/O2 WE RAS NC A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS I/O 4 I/O3 CAS OE A8 A7 A6 A5 A4 6V4256-1 TOP VIEW Figure 1. Pin Connections for DIP Package 2-14 CMOS 1M (256K × 4) Dynamic RAM LH6V4256 26-PIN SOJ I/O1 I/O2 WE RAS NC 1 2 3 4 5 26 25 24 23 22 VSS I/O4 I/O3 CAS OE TOP VIEW 28-PIN TSOP (Type I) TOP VIEW NC OE CAS I/O3 I/O4 VSS NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 NC A8 A7 A6 A5 A4 NC NC VCC A3 A2 A1 A0 NC A0 A1 A2 A3 VCC 9 10 11 12 13 18 17 16 15 14 A8 A7 A6 A5 A4 NC I/O1 I/O2 WE RAS NC 6V4256-2 6V4256-3 Figure 2. Pin Connections for SOJ Package Figure 3. Pin Connections for TSOP Package 2-15 LH6V4256 CMOS 1M (256K × 4) Dynamic RAM I/O1 1 I/O2 2 I/O3 18 I/O4 19 OE 16 OE CLOCK GENERATOR DATA IN BUFFER DATA OUT BUFFER VBB GENERATOR WE 3 R/W CLOCK GENERATOR 10 VCC CAS 17 CAS CLOCK GENERATOR SENSE AMP.
