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LH79524 - System-on-Chip

This page provides the datasheet information for the LH79524, a member of the LH79525 System-on-Chip family.

Description

The LH79524/LH79525, powered by an ARM720T, is a complete System-on-Chip with a high level of integration to satisfy a wide range of requirements and applications.

The SoC has a fully static design, power management unit, and low voltage operation (1.8 V Core, 3.3 V I/O).

Features

  • Highly Integrated System-on-Chip.
  • High Performance: 76.205 MHz CPU Speed, 50.803 MHz maximum AHB clock (HCLK).
  • 32-bit ARM720T™ RISC Core.
  • LH79524: 32-bit External Data Bus.
  • 208 CABGA package.
  • LH79525: 16-bit External Data Bus.
  • 176 LQFP package.
  • 8KB Cache with Write Back Buffer.
  • MMU (Windows CE™ Enabled).
  • 16KB On-Chip SRAM.
  • Flexible, Programmable Memory Interface.
  • SDRAM Interface.

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Datasheet preview – LH79524

Datasheet Details

Part number LH79524
Manufacturer Sharp
File Size 382.85 KB
Description System-on-Chip
Datasheet download datasheet LH79524 Datasheet
Additional preview pages of the LH79524 datasheet.
Other Datasheets by Sharp

Full PDF Text Transcription

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Data Sheet LH79524/LH79525 (A.1) System-on-Chip FEATURES • Highly Integrated System-on-Chip • High Performance: 76.205 MHz CPU Speed, 50.803 MHz maximum AHB clock (HCLK) • 32-bit ARM720T™ RISC Core – LH79524: 32-bit External Data Bus – 208 CABGA package – LH79525: 16-bit External Data Bus – 176 LQFP package • 8KB Cache with Write Back Buffer • MMU (Windows CE™ Enabled) • 16KB On-Chip SRAM • Flexible, Programmable Memory Interface – SDRAM Interface – 512 MB External Address Space – 32-bit External Data Bus (LH79524) – 16-bit External Data Bus (LH79525) – SRAM/Flash/ROM Interface – 15-bit External Address Bus – 32-bit External Data Bus (LH79524) – 16-bit External Data Bus (LH79525) • Multi-stream DMA Controller – Four 32-bit Burst-Based Data Streams • Clock and Power Management – 32.
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