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LRS1302 - Stacked Chip 8M Flash and 1M SRAM

This page provides the datasheet information for the LRS1302, a member of the LRS Stacked Chip 8M Flash and 1M SRAM family.

Description

The LRS1302 is a combination memory organized as 1448,576 X 8 bit static RAM in one package.

memory and 131,072X8 It is fabricated using silicon-gate CMOS process technology.

Features

  • OAccess Time Flashmemoryaccesstime SRAM access time OOpemtingcurrent Flash memory Read Byte write Block erase SRAM ostandbycurrent bit flash -.
  • . - -.
  • 130 nsMax. 70 nsMax. 12 mAMax. 57 r&Max. 37 mAMax. 25 mA Max. , (t&ti2OOns) operatin% hcxJz. =2=) Flash memory . . . . 20 @ Max. (F-EZF-Vc,0.2V, EbO.2V, F-V&O.2V) (S-EZS-Vc,0.2V) (T,=25”c, S-V,-3V, S-CErs-Vcc-0.2V) Sk4M.
  • . . . 30 pA Max. 0.7 @ Typ. (Total standby curnat is.

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Datasheet preview – LRS1302

Datasheet Details

Part number LRS1302
Manufacturer Sharp Corporation
File Size 3.33 MB
Description Stacked Chip 8M Flash and 1M SRAM
Datasheet download datasheet LRS1302 Datasheet
Additional preview pages of the LRS1302 datasheet.

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Full PDF Text Transcription

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PRODUCT SPECIFICATIONS ® Integrated Circuits Group LRS1302 8M Flash and 1M SRAM (Model No.: LRS13023) Stacked Chip Spec No.: EL116039 Issue Date: June 11, 1999 SHARP LRS13023 l Handle this document carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this material is prohibited without the express written permission of the company. When using the products covered herein, please observe the conditions written herein and the precautions outlined in the following paragraphs. In no event shall the company be liable for any damages resulting from failure to strictly adhere to these conditions and precautions. l (1) The products covered herein are designed and manufactured for the following application areas.
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