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HYB314400BJ-50- - 1M x 4-Bit Dynamic RAM

General Description

HYB 314400BJ-50 on request HYB 314400BJ-60 on request P-SOJ-26/20-2 300 mil 3.3 V DRAM (access time 50 ns) P-SOJ-26/20-2 300 mil 3.3 V DRAM (access time 60 ns) Semiconductor Group 2 1998-10-01 HYB 314400BJ-50/-60 3.3 V 1M × 4 DRAM P-SOJ-26/20-2 I/O1 I/O2 WE RAS A9 1 2 3 4 5 26 25 24 23 22 V

Key Features

  • include single + 3.3 V (± 0.3 V ) power supply, direct interfacing with high performance logic device families. Ordering Information Type Ordering Code Package.

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Full PDF Text Transcription for HYB314400BJ-50- (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for HYB314400BJ-50-. For precise diagrams, and layout, please refer to the original PDF.

1M × 4-Bit Dynamic RAM HYB 314400BJ-50/-60 Advanced Information • 1 048 576 words by 4-bit organization • 0 to 70 °C operating temperature • Fast Page Mode Operation • Pe...

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ion • 0 to 70 °C operating temperature • Fast Page Mode Operation • Performance: -50 -60 60 15 30 110 40 ns ns ns ns ns tRAC tCAC tAA tRC tPC RAS access time CAS access time Access time from address Read/Write cycle time Fast page mode cycle time 50 13 25 95 35 • Fast access and cycle time Single + 3.3 V (± 0.3 V) supply with a built-in VBB generator • Low power dissipation max. 252 mW active (-50 version) max. 216 mW active (-60 version) • Standby power dissipation: 7.2 mW max. standby (LVTTL) 3.6 mW max.

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