PEF2045 Datasheet | Siemens Semiconductor Group

Features systems q Time/space switch for 2048-, 4096- or 8192-kbit/s PCM q Switching of up to 512 ining PCM channels to up to 256 outgoing PCM channels q 16-input and 8-output PCM lines q Different kinds of modes (2048, 4096, 8192 kbit/s or mixed q q q q q q q q q q q mode) Configurable for primary access and standard applications Programmable clock shift with half clock step resolution for input and output in primary access configuration Configurable for a 4096- and 8192-k Hz device clock Tristate function for further expansion and tandem operation Tristate control signals for external drivers in primary access configuration 2048-k Hz clock output in primary access configuration Space switch mode 8-bit µP interface Single + 5 V power supply Advanced low power CMOS technology Pin and software patible to the PEB 2040 P-LCC-44 P-DIP-40 Type PEB 2045-N PEB 2045-P PEF 2045-N PEF 2045-P Version VA3 VA3 VA3 VA3 Ordering Code Q67100-H8602 Q67100-H8322 Q67100-H6055 Q67100-H6056 Package P-LCC-44 (SMD) P-DIP-40 P-LCC-44 (SMD) P-DIP-40 Semiconductor Group PEB 2045 PEF 2045 Pin Configurations (top view) P-LCC-44 P-DIP-40 Semiconductor Group PEB 2045 PEF 2045 Pin Definitions and Functions Pin No. P-DIP 1 2 Symbol Input (I) Function Output (O) I I Ground (OV) Synchronization Pulse: The PEx 2045 is synchronized relative to the PCM system via this line. PCM-Input Ports: Serial data is received at these lines at standard TTL levels. Pin No. P-LCC 1 3 4 7 9 11 13 14 15 16 17 18 19 5 8 10 12 20 3 5 7 9 11 12 13 14 15 16 17 4 6 8 10 18 IN1 IN5 IN9 IN13 IN14 IN15 IN10 IN11 IN6 IN7 IN2 IN0/TSC0 IN4/TSC1 IN8/TSC2 IN12/TSC3 IN3/DCL I I I I I I I I I I I I/O I/O I/O I/O I/O PCM-Input Port / Tristate Control: In standard configuration these pins are used as input lines, in primary access configuration they supply control signals for external devices. PCM-Input Port / Data Clock: In standard configuration IN3 is the PCM input line 3, in primary...