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HYB5116405BJ-60 - 4M x 4-Bit Dynamic RAM 2k & 4k Refresh

General Description

P-TSOPII-26/24-1 300 mil 3.3 V 50 ns EDO-DRAM P-TSOPII-26/24-1 300 mil 3.3 V 60 ns EDO-DRAM P-TSOPII-26/24-1 300 mil 3.3 V 50 ns EDO-DRAM P-TSOPII-26/24-1 300 mil 3.3 V 60 ns EDO-DRAM P-TSOPII-26/24-1 300 mil 3.3 V 50 ns LP-EDO-DRAM P-TSOPII-26/24-1 300 mil 3.3 V 60 ns LP-EDO-DRAM HYB 3116405BTL

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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4M × 4-Bit Dynamic RAM 2k & 4k Refresh (Hyper Page Mode - EDO) Advanced Information • 4 194 304 words by 4-bit organization • 0 to 70 °C operating temperature • Hyper Page Mode - EDO - operation • Performance: -50 HYB 5116405BJ-50/-60 HYB 5117405BJ-50/-60 HYB 3116405BJ/BT(L)-50/-60 HYB 3117405BJ/BT-50/-60 -60 60 15 30 25 ns ns ns ns tRAC RAS access time tCAC CAS access time tAA tRC Access time from address Read/Write cycle time 50 13 25 84 20 104 ns tHPC Hyper page mode (EDO) cycle time • Power dissipation, refresh & addressing: HYB 5116405 HYB 3116405 HYB 5117405 HYB 3117405 -50 Power supply Addressing Refresh L-version Active TTL Standby CMOS Standby CMOS Standby (L-version) 275 11 5.5 – -60 -50 -60 -50 -60 -50 -60 5 V ± 10% 12/10 3.3 V ± 0.3 V 12/10 5 V ± 10% 11/11 – 440 11 5.