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HYB5117800BSJ-50 - 2M x 8-Bit Dynamic RAM

General Description

N.C.

VCC I/O1 I/O2 I/O3 I/O4 WE RAS N.C.

Key Features

  • include single + 5 V (± 10 %) power supply, direct interfacing with high-performance logic device families such as Schottky TTL. Ordering Information Type HYB 5117800BSJ-50 HYB 5117800BSJ-60 HYB 5117800BSJ-70 Pin Names A0 to A10 A0 to A9 RAS OE I/O1-I/O8 CAS WE Row Address Inputs Column Address Inputs Row Address Strobe Output Enable Data Input/Output Column Address Strobe Read/Write Input Power Supply (+ 5 V) Ground (0 V) not connected Ordering Code Q67100-Q1092 Q67100-Q1093 Q67100-Q1094 Packag.

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Full PDF Text Transcription for HYB5117800BSJ-50 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for HYB5117800BSJ-50. For precise diagrams, and layout, please refer to the original PDF.

2M x 8-Bit Dynamic RAM HYB5117800BSJ-50/-60/-70 Advanced Information • • • 2 097 152 words by 8-bit organization 0 to 70 °C operating temperature Performance:: -50 tRAC t...

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organization 0 to 70 °C operating temperature Performance:: -50 tRAC tCAC tAA tRC tPC RAS access time CAS access time Access time from address Read/Write cycle time Fast page mode cycle time 50 13 25 90 35 -60 60 15 30 110 40 -70 70 20 35 130 45 ns ns ns ns ns • • Single + 5 V (± 10 %) supply Low power dissipation max. 660 active mW (-50 version) max. 605 active mW (-60 version) max. 550 active mW (-70 version) 11 mW standby (TTL) 5.5.

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