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HYB514100BJ-60 - 4M x 1-Bit Dynamic RAM

General Description

V SS DO CAS N.C.

DI WE RAS N.C.

A10 RAS CAS WE DI DO Address Input Row Address Str

Key Features

  • include single + 5 V (± 10 %) power supply, direct interfacing with high performance logic device families such as Schottky TTL. Type HYB 514100BJ-50 HYB 514100BJ-60 Ordering Code Q67100-Q971 Q67100-Q759 Package P-SOJ-26/20-2 300 mil P-SOJ-26/20-2 300 mil.

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Full PDF Text Transcription for HYB514100BJ-60 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for HYB514100BJ-60. For precise diagrams, and layout, please refer to the original PDF.

4M × 1-Bit Dynamic RAM HYB 514100BJ-50/-60 Advanced Information • 4 194 304 words by 1-bit organization • 0 to 70 °C operating temperature • Fast Page Mode Operation • Pe...

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ion • 0 to 70 °C operating temperature • Fast Page Mode Operation • Performance: -50 -60 60 15 30 110 40 ns ns ns ns ns tRAC RAS access time tCAC CAS access time tAA tRC tPC Access time from address Read/Write cycle time Fast page mode cycle time 50 13 25 95 35 • Single + 5 V (± 10 %) supply with a built-in VBB generator • Low power dissipation max. 660 mW active (-50 version) max. 605 mW active (-60 version) • Standby power dissipation: 11 mW max. standby (TTL) 5.5 mW max.

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