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HYB514256BJ-50 - 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM

General Description

DRAM (access time 50ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns)

Key Features

  • include single + 5 V (± 10 %) power supply, direct interfacing with high-performance logic device families such as Schottky TTL. These HYB 514256BL/BJL are specially selected for battery backup.

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Full PDF Text Transcription for HYB514256BJ-50 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for HYB514256BJ-50. For precise diagrams, and layout, please refer to the original PDF.

256 K × 4-Bit Dynamic RAM Low Power 256 K × 4-Bit Dynamic RAM HYB 514256B/BJ-50/-60/-70 HYB 514256BL/BJL-50/-60/-70 Advanced Information 262 144 words by 4-bit organizati...

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/BJL-50/-60/-70 Advanced Information 262 144 words by 4-bit organization • Fast access and cycle time 50 ns access time 95 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version) 70 ns access time 130 ns cycle time (-70 version) • Fast page mode cycle time 35 ns (-50 version) 40 ns (-60 version) 45 ns (-70 version) • Low power dissipation max. 495 mW active (-50 version) max. 440 mW active (-60 version) max. 385 mW active (-70 version) max. 5.5 mW standby max. 1.

More Datasheets from Siemens Semiconductor Group (now Infineon)

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