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HYB514800BJ - 512kx8-Bit Dynamic RAM

General Description

The HYB 514800BJ is the new generation dynamic RAM organized as 512 288 words by 8-bit.

Key Features

  • , ICC4 and ICC6 depend on cycle rate. ICC1 , ICC4 depend on output loading. 4) An initial pause of 200 µs is required after power-up followed by 8 RAS cycles of which at least one cycle has to be a refresh cycle, before proper device operation is achieved. In case of using the internal refresh counter, a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required. 5.

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Full PDF Text Transcription for HYB514800BJ (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for HYB514800BJ. For precise diagrams, and layout, please refer to the original PDF.

512kx8-Bit Dynamic RAM HYB 514800BJ -60/-70/-80 Advanced Information • • • 512 288 words by 8-bit organization 0 to 70 ˚C operating temperature Fast access and cycle time...

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ganization 0 to 70 ˚C operating temperature Fast access and cycle time RAS access time: 60 ns (-60 version) 70 ns (-70 version) 80 ns (-80 version) CAS access time: 20 ns Cycle time: 110 ns (-60 version) 130 ns (-70 version) 150 ns (-80 version) Fast page mode cycle time 45 ns (-60 version) 45 ns (-70 version) 50 ns (-80 version) Single + 5 V (± 10 %) supply with a built-in Vbb generator • Low power dissipation max. 605 mW active (-60 version) max. 550 mW active (-70 version) max. 468 mW active (-80 version) Standby power dissipation: 11 mW standby standby (TTL) 5.5 mW max.

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