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HYM368035S - 8M x 36-Bit EDO-DRAM Module

General Description

EDO-DRAM Module (access time 60 ns) EDO-DRAM Module (access time 60 ns) Semiconductor Group 2 HYM 368035S/GS-60 8M × 36-Bit EDO-Module Pin Configuration (top view) Pin Names A0-A10 DQ0-DQ35 CAS0 - CAS3 RAS0 - RAS3 WE Address Inputs for HYM 368035S/GS Data Input/Output Column Address Strobe Row

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Full PDF Text Transcription for HYM368035S (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for HYM368035S. For precise diagrams, and layout, please refer to the original PDF.

8M × 36-Bit EDO-DRAM Module HYM 368035S/GS-60 Advanced Information • • 8 388 608 words by 36-Bit organization in 2 banks Fast access and cycle time 60 ns RAS access time ...

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anization in 2 banks Fast access and cycle time 60 ns RAS access time 15 ns CAS access time 104 ns cycle time Hyper page mode (EDO) capability 25 ns cycle time Single + 5 V (± 10 %) supply Low power dissipation max. 7260 mW active CMOS – 132 mW standby TTL – 264 mW standby CAS-before-RAS refresh RAS-only-refresh Hidden-refresh 24 decoupling capacitors mounted on substrate All inputs, outputs and clocks fully TTL compatible 72 pin Single in-Line Memory Module (L-SIM-72-17) with 31.

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