HYM72V1620GS-50- Datasheet | Siemens Semiconductor Group

16M × 72-Bit Dynamic RAM Module (ECC - Module ) HYM 72V1620GS-50/-60 HYM 72V1630GS-50/-60 - 168 Pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank 16M x 72 organisation Optimized for ECC applications Fast Page Mode Operation Performance:: -50 t RAC t CAC t AA t RC t PC RAS access time CAS access time Access time from address Read/Write cycle time Fast page mode cycle time 50 18 30 90 35 -60 60 20 35 110 40 ns ns ns ns ns - - - - - - - - - - - - - Single + 3.3V ( ± 0.3V) supply CAS-before-RAS refresh, RAS-only-refresh Decoupling capacitors mounted on substrate All inputs, outputs and clock fully LVTTL & LVCMOS patible 4 Byte interleave enabled, Dual Address inputs (A0/B0) Buffered inputs excepts RAS and DQ Parallel Presence Detects Utilizes eighteen 16M × 4 -DRAMs and four Bi CMOS buffers/line drivers Two versions : HYM 72V1620GS with TSOPII-ponents (4 mm thickness) HYM 72V1630GS with SOJ-ponents (9 mm thickness) 8192 refresh cycles /...