HYM72V1625GS-50 Datasheet | Siemens Semiconductor Group

16M × 72-Bit EDO-DRAM Module (ECC - Module) 168pin buffered DIMM Module HYM 72V1625GS-50/-60 HYM 72V1635GS-50/-60 - 168 Pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank 16M x 72 organisation Optimized for ECC applications Extended Data Out ( EDO ) Performance: -50 t RAC t CAC t AA t RC t HPC RAS Access Time CAS Access Time Access Time from Address Cycle Time EDO Mode Cycle Time 50 ns 18 ns 30 ns 84 ns 20 ns -60 60 ns 20 ns 35 ns 104 ns 25 ns - - - - - - - - - - - - - Single + 3.3V ( ± 0.3V) supply CAS-before-RAS refresh, RAS-only-refresh Decoupling capacitors mounted on substrate All inputs, outputs and clock fully LVTTL & LVCMOS patible 4 Byte interleave enabled, Dual Address inputs (A0/B0) Buffered inputs excepts RAS and DQ Parallel Presence detects Utilizes eighteen 400mil wide 16M × 4 - EDO- DRAMs and Bi CMOS buffers/line drivers Two versions : HYM 72V1635GS with TSOPII-ponents (4 mm thickness) HYM 72V1625GS with SOJ-ponents (9...