HYM72V8000GS-60
8M × 72-Bit Dynamic RAM Module (ECC
- Module)
HYM 72V8000GS-50/-60 HYM 72V8010GS-50/-60
Preliminary Information
- -
8 388 608 words by 72-bit ECC
- mode, one bank organization Fast access and cycle time 50 ns access time 90 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version) Fast page mode capability with 35 ns cycle time (-50 version) 40 ns cycle time (-60 version) Single + 3.3V ± 0.3 V supply Low power dissipation max. 4536 m W active (-50 version) max. 3888 m W active (-60 version) CMOS
- 108 m W standby TTL
- 180 m W standby
- -
- -
- -
- -
- -
- CAS-before-RAS refresh, RAS-only-refresh 9 decoupling capacitors mounted on substrate All inputs, outputs and clock fully LVTTL & LVCMOS patible 4 Byte interleave enabled, Dual Address inputs (A0/B0) Buffered inputs excepts RAS and DQ 168 pin, dual read-out, Single in-Line Memory Module Utilizes nine 8M × 8 -DRAMs and four Bi CMOS 8-bit buffers/line drivers VT244A Two versions: HYM 72V8010GS with SOJ-ponents (...
