HYS64V4120GU-10 - 3.3V 4M x 64-Bit 2 BANK SDRAM Module 3.3V 4M x 72-Bit 2 BANK SDRAM Module

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Siemens

Part number	HYS64V4120GU-10
Manufacturer	Siemens
File Size	72.85 KB
Description	3.3V 4M x 64-Bit 2 BANK SDRAM Module 3.3V 4M x 72-Bit 2 BANK SDRAM Module
Datasheet	HYS64V4120GU-10 Datasheet
Additional preview pages of the HYS64V4120GU-10 datasheet.

A0-A10 BS (A11) DQ0 - DQ63 CB0-CB7 RAS CAS WE CKE0, CKE1 CLK0 - CLK3 DQMB0 - DQMB7 CS0 - CS3 Vcc Vss SCL SDA N.C.

s are registered on every rising clock edge during tRC(min). Values are shown per module bank. 2. The specified values are valid when data inputs (DQ’ s) are stable during tRC(min. ). 3. An initial pause of 100 µs is required after power-up, then a Precharge All Banks command must be given followed by 8 Auto.

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Other Datasheets by Siemens

HYS64V4120GU - 3.3V 4M x 64-Bit 2 BANK SDRAM Module 3.3V 4M x 72-Bit 2 BANK SDRAM Module
HYS64V4200GU-10 - 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4200GU-8 - 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4200GU-8B - 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4220GU-10 - 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4220GU-8 - 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4220GU-8-3 - 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module
HYS64V1000GS-10 - 3.3V 1M x 64-Bit SDRAM Module 3.3V 1M x 72-Bit SDRAM Module

Published: Apr 23, 2005 |