Siemens HYS72V64220GU
3.3V 64M x 72-Bit SDRAM
| Part No. | HYS72V64220GU |
|---|---|
| Datasheet | HYS72V64220GU Download |
| Manufacturer |  Siemens |
| Description | 3.3V 64M x 72-Bit SDRAM |
| Buy | Stock & Price |
3.3 V 16M × 64/72-Bit SDRAM Modules 3.3 V 32M × 64/72-Bit SDRAM Modules 3.3 V 64M × 64/72-Bit SDRAM Modules PC100-168 pin unbuffered DIMM Modules HYS 64/72V16200GU HYS 64/72V32220GU HYS 64/72V32200GU HYS 64/72V64220GU Preliminary Information
● 168 Pin unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications
● One bank 16M × 64, 16M × 72, 32M × 64 and 32M × 72 organization
● Two bank 32M × 64, 32M × 72, 64M × 64 and 64M × 72 organization
● Optimized for byte-write non-parity or ECC applications
● Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification
● JEDEC standard Synchronous DRAMs (SDRAM)
● SDRAM Performance: fCK Clock frequency (max.) tAC Clock access time
● Programmed Latencies: -8 -8B Units 100 100 MHz 6 6 ns Product Speed CL -8 PC100 2 -8B PC100 3 tRCD tRP 2 2 2 3
● Single + 3.3 V (± 0.3 V) power supply
● Programmable CAS Latency, Burst Length and Wrap Sequence (Sequential & Interleave)
● Auto Refresh (CBR) and Self Refresh
● Decoupling cap...
● 168 Pin unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications
● One bank 16M × 64, 16M × 72, 32M × 64 and 32M × 72 organization
● Two bank 32M × 64, 32M × 72, 64M × 64 and 64M × 72 organization
● Optimized for byte-write non-parity or ECC applications
● Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification
● JEDEC standard Synchronous DRAMs (SDRAM)
● SDRAM Performance: fCK Clock frequency (max.) tAC Clock access time
● Programmed Latencies: -8 -8B Units 100 100 MHz 6 6 ns Product Speed CL -8 PC100 2 -8B PC100 3 tRCD tRP 2 2 2 3
● Single + 3.3 V (± 0.3 V) power supply
● Programmable CAS Latency, Burst Length and Wrap Sequence (Sequential & Interleave)
● Auto Refresh (CBR) and Self Refresh
● Decoupling cap...
