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SDA2526 - Nonvolatile Memory 2-Kbit E2PROM with I2C Bus

General Description

I2C Bus Interface The I2C Bus is a bidirectional 2-line bus for the transfer of data between various integrated circuits.

It consists of a serial data line SDA and a serial clock line SCL.

The data line requires an external pull-up resistor to VCC (open drain output stage).

Key Features

  • q Word-organized programmable nonvolatile memory in q q q q q q q q q n-channel floating-gate technology (E2PROM) 256 × 8-bit organization Supply voltage 5 V Serial 2-line bus for data input and output (I2C Bus) Reprogramming mode, 10 ms erase/write cycle Reprogramming by means of on-chip control (without external control) Check for end of programming process Data retention > 10 years More than 104 reprogramming cycles per address Compatible with SDA 2526. Exceptions: Conditions for total erase.

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Nonvolatile Memory 2-Kbit E2PROM with I2C Bus SDA 2526-5 Preliminary Data MOS IC Features q Word-organized programmable nonvolatile memory in q q q q q q q q q n-channel floating-gate technology (E2PROM) 256 × 8-bit organization Supply voltage 5 V Serial 2-line bus for data input and output (I2C Bus) Reprogramming mode, 10 ms erase/write cycle Reprogramming by means of on-chip control (without external control) Check for end of programming process Data retention > 10 years More than 104 reprogramming cycles per address Compatible with SDA 2526.