The 54/74S200/201 and 54/74S301 are Schottky clamped TTL, read/write memory arrays organized as 256 words of one bit each.
They feature either open collector or tri-state outputs options for optimization of word expansion in bussed organizations.
| Part number | 74S200 |
|---|---|
| Manufacturer | Signetics |
| File Size | 193.56 KB |
| Description | TTL 256 x 1 RAM |
| Datasheet |
 74S200 Datasheet
|
|
|
| Part Number | Description | Manufacturer |
|---|---|---|
| 74S240 | Buffers / Lind Drivers / Line Receivers | National Semiconductor |
| 74S240 | Octal 3-State Buffer / Line Driver / Line Receiver | Fairchild |
| 74S241 | Buffers / Lind Drivers / Line Receivers | National Semiconductor |
| 74S241 | Octal 3-State Buffer / Line Driver / Line Receiver | Fairchild |
| 74S244 | Buffers / Lind Drivers / Line Receivers | National Semiconductor |
| Part Number | Description |
|---|---|
| 74S201 | TTL 256 x 1 RAM |
| 74S134 | 12-INPUT POSITIVE-NAND GATES |
| 74S135 | Quad Exclusive OR/NOR Gate |
| 74S189 | 64-Bit Bipolar Scratch Pad Memory |
| 74S300 | TTL 256 x 1 RAM |
The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.
