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!iinoOliC!i 82S214 2048-BIT BIPOLAR ROM (256x8 ROM) 82S215 __~______________4_09_6-_BIT_B_IPO_LA_R_RO_M(_51_2X8_R_OM~)
DIGITAL 8000 SERIES TTL/MEMORY
DESCRIPTION
The 82S214 and 82S215 are Schottky-clamped Read Only Memories, incorporating on-chip data output registers.
The 82S214 and 82S215 are fully TTL compatible, and include on-chip decoding and two chip enable inputs for ease of memory expansion. They feature Tri-State outputs for optimization of word expansion in bussed organiza1 uns. A D-type latch is used to enable the Tri-State output d ivers.1 n the TRANSPARENT READ mode, stored data is addressed by applying a binary code to the address inputs while holding STROBE high. In this mode the bit drivers will be controlled solely by CE1 and CE2 lines.