GENERAL DESCRIPTION
Fast transient response and excellent stability are achieved by the quasi-fixed frequency constant off time control strategy. A reverse blocking switch will be integrated at the input side to prevent from energy leaking when the input power source is removed or inserted with inverse polarity. Three different BUS over voltage protection (OVP) thresholds are selectable by the OVP pin for the applications with different kinds of input power source. I2C interface is integrated in the SY72001 to reduce the amount of the external components. Control parameters such as input current limit, switching frequency, and Boost peak current limit can be programmed by the I2C. Storage capacitance measurement and abnormal storage capacitor ESR detection circuit are integrated of the SY72001. The measurement results are stored in internal read only data registers for MCU reading by the I2C interface. The SY72001 along with QFN4×4-25 package provides compact PCB layout to save circuit area for the increase of the SSD memory capacity.