GENERAL DESCRIPTION
Fast transient response and excellent stability are achieved by the quasi-fixed frequency constant off time control strategy. A reverse blocking switch is integrated at the input side to prevent from energy leaking when the input power source is removed. Three different BUS over voltage protection (OVP) thresholds are selectable by OVP pin for the applications with different kind of input power source. I2C interface is internally integrated in SY72025 to reduce the amount of external components. Control parameters such as input current limit, switching frequency, and boost peak current limit can be programmed by I2C. Storage capacitance measurement is integrated inside of SY72025. The measurement results are stored in internal read only data registers for MCU reading by I2C interface. SY72025 along with QFN4×4-25 package provides compact PCB layout to save circuit area for the increase of SSD memory capacity. Ordering Information SY72025□(□□□ ) Pa cka ge Code Option...