8051F310 Datasheet | Silicon Labs

C8051F310/1/2/3/4/5/6/7 8/16 kB ISP Flash MCU Family Analog Peripherals - 10-Bit ADC (C8051F310/1/2/3/6 only) - - - - - High Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Up to 200 ksps Up to 21, 17, or 13 external single-ended or differential inputs VREF from external pin or VDD Built-in temperature sensor External conversion start input Programmable hysteresis and response time Configurable as interrupt or reset source (parator0) Low current ( 0.5 µA) - parators - - - - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler Memory - 1280 bytes internal data RAM (1024 + 256) - 16 kB (C8051F310/1/6/7...