Download the C8051F865 datasheet PDF.
This datasheet also covers the C8051F850 variant, as both devices belong to the same low-cost 8-bit mcu family and are provided as variant models within a single manufacturer datasheet.
Key Features
26
N 2.2.2. Crossbar 26
2.3. Clocking 27
r 2.4. Counters/Timers and PWM 27
fo 2.4.1. Programmable Counter Array (PCA0) 27
2.4.2. Timers (Timer 0, Timer 1, Timer 2 and Timer 3) 27
2.4.3. Watchdog Timer (WDT0) 27
d 2.5. Communications and other Digital Peripherals 28
e 2.5.1. Universal Asynchronous Receiver/Transmitter (UART0) 28
2.5.2. Serial Peripheral Interface (SPI0) 28
d 2.5.3. System Management Bus / I2C (SMBus0) 28
n 2.5.4. 16/32-bit CRC (CRC0) 28
e 2.6. Analog Periphe.
Note: The manufacturer provides a single datasheet file (C8051F850-SiliconLaboratories.pdf) that lists specifications for multiple related part numbers.
Full PDF Text Transcription for C8051F865 (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
C8051F865. For precise diagrams, and layout, please refer to the original PDF.
C8051F85x/86x Low-Cost 8-bit MCU Family with up to 8 kB of Flash Memory High-Speed CIP-51 μC Core - Up to 8 kB flash - Efficient, pipelined instruction architecture - Fla...
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Up to 8 kB flash - Efficient, pipelined instruction architecture - Flash is in-system programmable in 512-Byte sectors - Up to 512 Bytes RAM (256 + 256) On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in- system debug (no emulator required) - Provides breakpoints, single stepping, inspect/modify memory and registers 12-Bit Analog-to-Digital Converter - Up to 16 input channels - Up to 200 ksps 12-bit mode or 800 ksps 10-bit mode - Internal VREF or external VREF supported - Up to 25 MIPS throughput with 25 MHz clock - Uses standard 8051 instruction set - Expanded interrupt handler s Communicatio
C8051F865 Datasheet
