EFM32G280 Datasheet | Silicon Labs

...the world's most energy friendly microcontrollers EFM32G280 DATASHEET F128/F64/F32 - ARM Cortex-M3 CPU platform - High Performance 32-bit processor @ up to 32 MHz - Memory Protection Unit - Wake-up Interrupt Controller - Flexible Energy Management System - 20 n A @ 3 V Shutoff Mode - 0.6 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out Detector, RAM and CPU retention - 0.9 µA @ 3 V Deep Sleep Mode, including RTC with 32.768 k Hz oscillator, Power-on Reset, Brown-out Detector, RAM and CPU retention - 45 µA/MHz @ 3 V Sleep Mode - 180 µA/MHz @ 3 V Run Mode, with code executed from flash - 128/64/32 KB Flash - 16/16/8 KB RAM - 86 General Purpose I/O pins - Configurable push-pull, open-drain, pull-up/down, input filter, drive strength - Configurable peripheral I/O locations - 16 asynchronous external interrupts - Output state retention and wake-up from Shutoff Mode - 8 Channel DMA Controller - 8 Channel Peripheral Reflex System (PRS) for autonomous inter-peripheral signaling - Hardware AES with 128/256-bit keys in 54/75 cycles - Timers/Counters - 3× 16-bit Timer/Counter - 3×3 pare/Capture/PWM channels - Dead-Time Insertion on TIMER0 - 16-bit Low Energy Timer - 1× 24-bit Real-Time Counter - 3× 8-bit Pulse Counter - Watchdog Timer with dedicated RC oscillator @ 50 n A - External Bus Interface for up to 4x64 MB of external memory mapped space - munication interfaces - 3× Universal Synchronous/Asynchronous Receiver/Transmitter - UART/SPI/Smart Card (ISO 7816)/Ir DA - Triple buffered full/half-duplex operation - 1× Universal Asynchronous Receiver/Transmitter - 2× Low Energy UART - Autonomous operation with DMA in Deep Sleep Mode - I2C Interface with SMBus...