Download SI53325 Datasheet PDF
SI53325 page 2
Page 2
SI53325 page 3
Page 3

SI53325 Description

Functional Description The Si53320-28 are a.

SI53325 Key Features

  • Ultra-low additive jitter: 50 fs rms
  • Built-in LDOs for high PSRR performance
  • Up to 10 LVPECL Outputs
  • Any-format Inputs (LVPECL, Low-power
  • Wide frequency range: dc to 1250 MHz
  • Output Enable option
  • Multiple configuration options
  • Dual Bank option
  • 2:1 Input Mux operation
  • RoHS pliant, Pb-free