SI5346 Description
The Si5347 is a high performance jitter attenuating clock multiplier which integrates four any-frequency DSPLLs for applications that require maximum integration and independent timing paths. The Si5346 is a dual DSPLL version in a smaller package. Each DSPLL has access to any of the four inputs and can provide low jitter clocks on any of the device outputs.
SI5346 Key Features
- Four or two independent DSPLLs in a
- Automatic free-run and holdover modes
- Fastlock feature for low nominal
- Each DSPLL generates any output
- Input frequency range
- Glitchless on-the-fly DSPLL frequency changes
- Differential: 8 kHz to 750 MHz
- DCO mode: as low as 0.01 ppb steps
- LVCMOS: 8 kHz to 250 MHz
- Output frequency range