Si5350C Overview
The Si5350C generates free-running and/or synchronized clocks selectable on each of its outputs. A dual PLL + high resolution MultiSynthTM fractional divider architecture enables this user-definable custom timing device to generate any of the specified output frequencies at any of its outputs. This allows the Si5350C to replace a bination of crystals, crystal oscillators, and synchronized clocks (PLL).
Si5350C Key Features
- Generates up to 8 non-integer-related
- Operates from a low-cost, fixed
- Exact frequency synthesis at each
- Separate voltage supply pins
- Core VDD: 2.5 V or 3.3 V
- Glitchless frequency changes
- Output VDDO: 2.5 V or 3.3 V
- Low output period jitter: 100 ps pp
- Excellent PSRR eliminates external
- Configurable Spread Spectrum