Si5396 Datasheet PDF (Any-Frequency Any-Output Jitter Attenuators)

Si5396 - Any-Frequency Any-Output Jitter Attenuators

This page provides the datasheet information for the Si5396, a member of the Si5397 Any-Frequency Any-Output Jitter Attenuators family.

Features

Each DSPLL generates any output frequency from any input frequency.
Four or two DSPLLs to synchronize to multiple time domains.
Ultra-low phase jitter of 95 fs rms.
Enhanced hitless switching minimizes output phase transients.
Input frequency range:.
Differential: 8 kHz to 750 MHz.
LVCMOS: 8 kHz to 250 MHz.
Output frequency range:.
Differential: 100 Hz to 720 MHz.
LVCMOS: 100 Hz 250 MHz.
Status Mo.

Datasheet Details

Part number	Si5396
Manufacturer	Silicon Laboratories
File Size	1.86 MB
Description	Any-Frequency Any-Output Jitter Attenuators
Datasheet	Si5396 Datasheet
Additional preview pages of the Si5396 datasheet.

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Full PDF Text Transcription

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Si5397/96 Data Sheet Dual/Quad DSPLL™ Any-Frequency, Any-Output Jitter Attenuators The Si5397 is a high-performance, 8-output jitter-attenuating clock multiplier which integrates four any-frequency DSPLLs for applications that require maximum integration and independent timing paths. The Si5396 is a dual DSPLL version with either 4 outputs or 12 outputs. Each DSPLL has access to any of the four inputs and can provide low jitter clocks on any of the device outputs. Device grades J/K/L/M have an integrated reference to save board space, improve system reliability and reduces the effect of acoustic emissions noise caused by temperature ramps. Grades A/B/C/D use an external crystal (XTAL) or crystal oscillator (XO) reference.

Published: Oct 4, 2019 |