Description
VC = Voltage Control Pin OE = Output enable GND = Ground CLK+ = Clock output CLK- = Complementary clock output.
3.3V Operation
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Features
- Available with any frequency from 200 kHz to 3000 MHz.
- Ultra low jitter: 100 fs RMS typical (12 kHz.
- 20 MHz).
- Excellent PSRR and supply noise immunity:.
- 80 dBc Typ.
- 3.3 V, 2.5 V and 1.8 V VDD supply operation from the same part number.
- LVPECL, LVDS, CML, HCSL, CMOS, and Dual CMOS output options.
- 3.2x5, 5x7 mm package footprints.
- Samples available with 1-2 week lead times.
Si565 Datasheet
