The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
monolithic dual n-channel JFETs
designed for • • •
H
Siliconix
Performance Curves NQP See Section 4
• Low and Medium Frequency DiHerential Amplifiers
BENEFITS
• Minimum System Error and Calibration
*ABSOLUTE MAXIMUM RATINGS (25°C)
Any Lead-To-Case Voltage _••.•.••••••••••.... ±100 V Gate-Drain or Gate-Source Voltage .•••.••....••• -50 V Gate Current .••.••.••••••••••••••••••••.... 50 rnA Total Device Dissipation at (Each Side) ............•250 mW 85°C Case Temperature (Both Sides) ....•..•....500 mW
Power Derating (Each Side) ••••••••••••.• 2.86 mWrC (Both Sides) ••••.•••.•••••• 4.3 mWrC
5 mV Offset Maximum (2N5452)
• Simplifies Amplifier Design Output Conductance Less that 1 J./mho
TO·71 See Section 6
~~G, G2
Storage Temperature Range .•••••.•••••.