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monolithic dual n-channel JFETs designed for • • •
• FEr Input Amplifiers • Low and Medium Frequency
Amplifiers
• Impedance Converters
Hm oo~
Performance Curves NQP See Section 4
BENEFITS
m
-o ~
• Minimum System Error and Calibration
10 mV Offset Maximum (E400,
E401)
80 dB Typical CMRR
• Low Drift with Temperature 10/Nrc (E400)
• Simplifies Amplifier Design
Output Conductance < 10 Ilmho
ABSOLUTE MAXIMUM RATINGS (25°C) Gate-To-Gate Voltage _______ .................. ±40 V Gate-Drain or Gate-Source Voltage ............... -40 V Gate Cu rrent ............................. - . SOmA Total Package Dissipation
(25°C Free-Air Temperature) ............... _ 3S0mW Power Derating (to +12Soc). ........... _.... 3.S mWrC Storage Temperature Range ..............