J406
monolithic dual n-channel JFETs designed for
- -
- FEY Input Amplifiers
- - Low and Medium Frequency Amplifiers
- Impedance Converters
- Precision Instrumentation
Amplifiers
- parators
ABSOLUTE MAXIMUM RATINGS (25"C)
Gate-Drain or Gate-Source Voltage Forward Gate Current . Device Dissipation (each side)
@T~ =85°C derate 7.5 mwrc
Total evice Dissipation
@TA = 85°C derate 11 m W/"C
Storage Temperature Range . .
50V 10m A
300m W
500m W
- -5- 5 to +150°C
Performance Curves NNR See Section 4
BENEFITS
- Low Cost, Automated Insertion Package
- Minimum System Error and Calibra- tion
5 m V Offset Maximum (J401)
95 d B Minimum CMRR (J401-04)
- Low Drift with Temperature
10 p'vrc Maximum (J401, 02)
- Operates from Low Power Supply Voltages VGS(off) < 2.5 V
- Simplifies Amplifier Design
< Output Conductance 2 p.mho
- Low Noise en = 6 n V/v'Hz at 10 Hz Typical a- Pin Mini DIP See Section 5
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ELECTRICAL CHARACTERISTICS (@ 25°C unless otherwise noted)
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