FEATURES
Number of LCD drive outputs: 240 Supply voltage for LCD drive: +15.0 to +30.0 V Supply voltage for the logic system: +2.5 to +5.5 V Low power consumption Low output impedance (Segment mode) Shift clock frequency 15MHz(MAX.): VDD = +5.0 ± 0.5V 12MHz(MAX.): VDD = +3.0 to + 4.5V 8MHz(MAX.): VDD = +2.5 to + 3.0V Adopts a data bus system 4-bit/8-bit parallel input modes are selectable with a mode (MD) pin Automatic transfer function of an enable signal Automatic counting function which, in the chip selection mode, causes the internal clock to be stopped by automatically counting 240 bits of input data Line latch circuits are reset when /DISPOFF active (Common mode) Shift clock frequency: 4 MHz (MAX.) Built-in 240-bit bi-directional shift register (divisible into 120 bits x 2) Available in a single mode (240-bit shift register) or in a dual mode (120-bit shift register x 2) Y1->Y240 Single mode Y240->Y1 Single mode Y1->Yl20, Y121->Y240 Dual mode Y240->Y121, Yl20->Y1 Dual mode The above 4 shift directions are pin-selectable Shift register circuits are reset when /DISPOFF active 2.
Sitronix Technology
