Si5328 Description
The Si5328 is a jitter-attenuating precision clock multiplier for Synchronous Ethernet applications requiring sub 1 ps jitter performance and ultra-low loop bandwidth. When bined with a low-wander, lowjitter reference oscillator, the Si5328 meets all of the wander, MTIE, TDEV, and other requirements listed in ITU-T G.8262/Y.1362. The Si5328 accepts two input clocks ranging from 8 kHz to 710 MHz and generates two...
Si5328 Key Features
- Fully-pliant with ITU-T G.8262, EEC options 1 and 2
- Generates any frequency from 8 kHz to 808 MHz
- Dual clock outputs with selectable signal format (LVPECL, LVDS, CML, CMOS)
- LOL, LOS, FOS alarm outputs
- I2C or SPI programmable
- On-chip voltage regulator for 2.5 ±10% or 3.3 V ±10%
- Small size: 6 x 6 mm 36-lead QFN
- Dual clock inputs with manual or automatically controlled hitless
- Pb-free, ROHS pliant