Si53302 Description
Input Input MUX Output Glitch- LOS less Output Switch1 OE Option Synchro- Clk Dividnous OE1 er Option Si53301-B-GM 6 output universal buffer Yes 2 6 Diff / 12 Yes with 2:1 input mux SE Yes Per Bank Yes Per Bank Si53302-B-GM 10 output universal buffer Yes 2 10.
Si53302 Key Features
- Ultra-low additive jitter: 50 fs rms
- Built-in LDOs for high PSRR performance
- Up to 10 outputs
- Any-format Inputs (LVPECL, Low-power
- Wide frequency range
- Output Enable option
- Multiple configuration options
- Dual Bank option
- 2:1 Input Mux operation
- Synchronous output enable