DESCRIPTION
PIN CONFIGURATION SOP-8 FEATURE 40V/10.0A, RDS(ON) = 20mΩ (Typ.) @VGS = 10V 40V/8.0A, RDS(ON) = 23mΩ @VGS = 4.5V 40V/6.0A, RDS(ON) = 27mΩ @VGS = 2.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOP-8 package design PART MARKING STN4546 YA Y: Year Code A: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp. STN4546 2009. V1 STN4546 N Channel Enhancement Mode MOSFET 6.0A ABSOULTE MAXIMUM RATINGS
(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Drain-Source Voltage VDSS Gate-Source Voltage Continuous Drain Current (TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current VGSS ID IDM Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature IS PD TJ Storgae Temperature Range TSTG Thermal Resistance-Junction to Ambient RθJA Typical 40 ±12 6.0 5.0 30 2.3 2.5 1.6 -55/150 -55/150 80 Unit V V A A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp.