STP601D Datasheet PDF | Stanson Technology

Stanson Technology STP601D

STP601/STP601D is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. The STP401 has been designed specially to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed.

Part No.	STP601D
Datasheet	STP601D Download
Manufacturer	Stanson Technology
Description	P-Channel Enhancement Mode MOSFET
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DESCRIPTION

PIN CONFIGURATION (D-PAK) TO-252 TO-251 FEATURE -60V/-20.0A, RDS(ON) = 20mΩ(typ.) @VGS = -10V -60V/-20.0A, RDS(ON) = 27mΩ @VGS = -4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability TO-252,TO-251 package design ( STP601D ) PART MARKING ( STP610 ) Y: Year Code A: Week Code Q: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp. STP601 / STP601D 2010. V1 STP601 / STP601D P Channel Enhancement Mode MOSFET -30A ABSOULTE

MAXIMUM RATINGS

(Ta = 25℃ Unless otherwise noted) Parameter Drain-Source Voltage Symbo l VDSS Gate-Source Voltage Continuous Drain Current (TJ=150℃) Pulsed Drain Current TA=25℃ TA=100℃ VGSS ID IDM Continuous Source Current (Diode Conduction) IS Power Dissipation TA=25℃ PD Operation Junction Temperature TJ Storage Temperature Range TSTG Thermal Resistance-Junction to Ambient RθJA Typical -60 ±20 -30.0 -22.0 -110 -30 60 150 -55/150 25 Unit V V A A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp.