Sun STP2220ABGA
the STP2001 SLAVIO- 3.3 volt output level Indicates write on EBus Indicates read on EBus Miscellaneous Signals Signal CLK+ CLKDESCRIPTION
The Uniprocessor System Controller (USC) has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients. Uniprocessor System ControllerFEATURES
● Controls up to eight standard SS-10/SS-20-type DRAM SIMMs● Supports various memory SIMM organizations: 16 MB, 64 MB, and 256 MB as well as dual-stacked 128-MB SIMMs
● Controls and generates a number of resets for the system
● Programmed via a standard 8-bit asynchronous interface (EBus)
● JTAG interface allows full chip scan
● 225-pin ABGA package Benefits
● Standard workstation memory
● Flexibility
● High integration
● Allows design of low-cost, low-chip-count embedded systems
● Ease of design and testability
● Low cost The USC is used as the system controller of a complete Uniprocessor UltraSPARC system. Note: Instead of using the U2S, the USC can also be used with the UPA to PCI-bus; I/O interface controller (U2P) UPA Devices Abbreviation...