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STP2222ABGA - Uniprocessor System Controller

This page provides the datasheet information for the STP2222ABGA, a member of the STP2200ABGA Uniprocessor System Controller family.

Datasheet Summary

Description

The Uniprocessor System Controller (USC) has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus.

It also controls the resets going to all UPA clients.

Features

  • Controls up to eight standard SS-10/SS-20-type DRAM SIMMs.
  • Supports various memory SIMM organizations: 16 MB, 64 MB, and 256 MB as well as dual-stacked 128-MB SIMMs.
  • Controls and generates a number of resets for the system.
  • Programmed via a standard 8-bit asynchronous interface (EBus).
  • JTAG interface allows full chip scan.
  • 225-pin ABGA package Benefits.
  • Standard workstation memory.
  • Flexibility.
  • High integration.

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Datasheet preview – STP2222ABGA

Datasheet Details

Part number STP2222ABGA
Manufacturer Sun
File Size 441.25 KB
Description Uniprocessor System Controller
Datasheet download datasheet STP2222ABGA Datasheet
Additional preview pages of the STP2222ABGA datasheet.

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Full PDF Text Transcription

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STP2200ABGA July 1997 USC DATA SHEET DESCRIPTION The Uniprocessor System Controller (USC) has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.
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