SEN01G64D1BF1SA-30R
Features
: 200 Pin SO-DIMM SEN01G64D1BF1SA-30R 1GB PC2-6400 in FBGA Technology Ro HS pliant
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- 200-pin 64-bit Small Outline, Dual-In-Line Double Data Rate Synchronous DRAM Module Module organization: single rank 128M x 64 VDD = 1.8V ±0.1V, VDDQ 1.8V ±0.1V 1.8V I/O ( SSTL_18 patible) Auto Refresh (CBR) and Self Refresh 8k Refresh every 64ms Serial Presence Detect with EEPROM Gold-contact pad This module is fully pin and functional patible to the JEDEC PC2-6400 spec. and JEDEC- Standard MO-224. (see .jedec.org) The pcb and all ponents are manufactured according to the Ro HS pliance specification [EU Directive 2002/95/EC Restriction of Hazardous Substances (Ro HS)] DDR2
- SDRAM ponent SAMSUNG K4T1G084QF DIE Rev. F 128Mx8 DDR2 SDRAM in FBGA-60 package Four bit prefetch architecture DLL to align DQ and DQS transitions with CK Eight internal device banks for concurrent operation Programmable CAS latency (CL) Posted CAS additive latency (AL) WRITE latency = READ latency
- 1 t CK...
