NS10N65K Datasheet | Synmosaic

Description： NS10N65K , the silicon N-channel Enhanced VDMOSFET, is obtained by the self-aligned planar Technology which reduce the conduction loss, improve switching performance and enhance the VDSS ID PD(TC=25℃) RDS(ON) Ω avalanche energy. The transistor can be used in various power switching circuit for system miniaturization and higher efficiency. The package form is TO- 252 , which accords with the Ro HS standard. Features ： - Fast Switching - Low ON Resistance(Rdson≤0.9Ω) - Low Gate Charge (Typical Data: 29n C) - Low Reverse transfer capacitances(Typical: 15p F) s - 100% Single Pulse avalanche energy Test e Applications: im - Power switch circuit of adaptor and charger t Absolute（Tc=25℃ unless otherwise specified）： Symbol Parameter ng VDSS he ID gs IDMa1 n VGS To EAsa2 Drain-to-Source Voltage Continuous Drain Current Continuous Drain Current TC=100 °C Pulsed Drain Current Gate-to-Source Voltage Single Pulse Avalanche Energy EAra1 Avalanche Energy ,Repetitive r IAR a1 Avalanche Current Fodv/dta3 Peak Diode Recovery dv/dt Use Only Rating 650 10 5.5 32 ±30 600 60 3.5 5.0 Units V A A A V m J m J A V/ns Power Dissipation PD Derating Factor above 25°C W/℃ TJ，Tstg Operating Junction and Storage Temperature Range 150，- 55 to 150 ℃ TL Maximum Temperature for Soldering ℃ Caution Stresses greater than those in the “Absolute Maximum Ratings” may cause permanent damage to the...