SL74HC112 - Dual J-K Flip-Flop with Set and Reset

System Logic Semiconductor

Datasheet Details

Part number	SL74HC112
Manufacturer	System Logic Semiconductor
File Size	49.05 KB
Description	Dual J-K Flip-Flop with Set and Reset
Datasheet	SL74HC112 Datasheet
Additional preview pages of the SL74HC112 datasheet.

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Full PDF Text Transcription

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SL74HC112 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.

Published: Apr 16, 2005 |