TM162EBAWG2 Overview
H:D0-D7 are display data L:D0-D7 are controller mand WR CS D7 D6 D5 D4 D3 D2 D1 D0 Vdd Vss V5 V4 V3 V2 V1 Vout Vss Vdd P/S IF RES 80 family MPU:WR Signal Input 68 family MPU:Enable clock input Chip selects signal Data Bus Line Data Bus Line Data Bus Line Data.