TSDP1808 Datasheet | TSI

DESCRIPTION The TSDP18xx is an ultra low-power, high-performance, 8 channel PDM to Linear PCM converter. It supports Digital MEMS Microphone (DMIC) over sample rates up to 6.144MHz; and output sampling rates of 8KHz up to 384KHz enabling support for Ultrasonic capable DMICs. TSDP18xx supports 2 channel I2S or Left-Justified (LJ) format output as well as up to 8 channels using the Time-Division Multiplexed (TDM) format. The device enables a wide variety of configurations 32-bit, 24-bit or 16-bit word lengths, clock polarity inversion, and more to maximize patibility with almost any DSP, Audio Processor, Codec or SOC. The supplied DMIC sources are driven by a configurable PDM clock ranging from 256k Hz up to 6.144MHz, while the digital audio interface operates in slave mode with the supplied SCLK signal ranging from 2MHz up to 49.152MHz, and a LRCLK input providing a frame signal matched to the format, I2S or TDM. There is a wide range of support for SCLK to LRCLK / FRMCLK ratios ranging from 32Fs to 512Fs. Configuration of the FIR and decimation filter coefficients are based on bination of SCLK to LRCLK / FRMCLK ratio and the three OS_MODE pins which impact the Oversampling Mode, supporting 8x to 256x. APPLICATIONS - 1~8 Channel Digital Microphone Arrays including: - Smart Speakers / Smart Screens - Voice Assistance Enabled Devices - Audio / Video Conferencing Systems - Augmented / Virtual Reality Systems - Multi-Mic Beam Forming Applications - Far Field Voice Pickup Applications - Multichannel Audio Recording Applications - DSD to PCM Conversion BLOCK DIAGRAM 1.62V TO 3.6V 1.62V TO 1.98V FEATURES - High-Fidelity Octal PDM to Linear PCM Converter - Internal processing takes place at the DMIC clock rate - > 142d B SNR / DNR / THD+N Level (20Hz ~ 20k Hz) - Output Fs supports 8k Hz up to 384k Hz - Configurable DMIC fixed output clock, based on Fs of supplied LRCLK and specified oversampling mode - Support for wide range of SLCK to LRCLK / FRMCLK ratios: 32x, 48x, 64x, 96x,...