T14L1024N Datasheet | Taiwan Memory Technology

FEATURES - Fast Address Access Times : 10/12/15ns - Single 3.3V ±0.3V power supply - Center power/ground pin configuration - Low Power Consumption : 110/105/100m A - TTL I/O patible - 2.0V data retention mode - Automatic power-down when deselected - Available packages : - 32-pin 300 mil and 400 mil SOJ - 32-pin TSOP 8x13.4mm and 8x20mm - 36-Ball CSP (8x10mm) 128K X 8 HIGH SPEED CMOS STATIC RAM GENERAL DESCRIPTION The T14L1024N is a one-megabit density, fast static random access memory organized as 131,072 words by 8 bits. It is designed for use in high performance memory applications such as main memory storage and high speed munication buffers. Fabricated using high performance CMOS technology, access times down to 10ns are achieved. BLOCK DIAGRAM Vcc Vss A0 . .. . A16 CE DATA I/O WE OE DECODER PART NUMBER EXAMPLES T14L1024N-10J T14L1024N-10W T14L1024N-10P T14L1024N-10H T14L1024N-10C PACKAGE SPEED SOJ 300mil 10ns SOJ 400 mil 10ns 10ns TSOP 8x13.4mm TSOP 8x20mm 10ns 36-Ball CSP 10ns CORE ARRAY I/O0 . . . I/O7 PIN DESCRIPTION SYMBOL A0 - A16 I/O0 - I/O7 CE WE OE Vcc Vss DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Inputs Write Enable Output Enable Power Supply Ground TM Technology Inc. reserves the right P. 1 to change products or specifications without notice. Publication Date: APR. 2002 Revision: C Data Sheet 4 U . .. tm A0 A1 A2 A3 CE I/O0 I/O1 Vcc Vss I/O2 I/O3 WE A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 TE CH PIN CONFIGURATION 32 31 30 29 28 27 A16 A15 A14 A13 OE I/O7 I/O6 Vss Vcc I/O5 I/O4 A12 A11 A10 A9 A8 26 25 24 23 22 21 20 19 18 17 A0 A1 A2 A3 CE I/O0 I/O1 VCC VSS I/O2 I/O3 WE A4 A5 A6...